Member Login

Forget PasswordRegister

Ansys SIwave

Ansys SIwave can simulate the designs of PCB and BGA packaging, and test their signal integrity and power integrity. As the development of modern electronic components is advancing towards low voltage and low power consumption, the noise margin of PCB and package is getting smaller. For instance, in circuits of the memory unit, the major cause of system defects is usually the noise of synchronous switching, making the optimization of the power supply system design essential to ensure the normal operation of the system's technical indicators and circuits. Ansys SIwave uses the latest optimization algorithm that can rapidly conduct overall simulation computing for circuit boards of massive scale with complex structures. This includes the extraction of signal line parameters, extraction of power/ground plane parameters, DC voltage drop simulation, crosstalk simulation, far-field and near-field radiation simulation, electromagnetic susceptibility simulation, and capacitance and inductance component model library. It can conduct bidirectional coupling simulation and system simulation with Ansys structure/fluid software and circuit/system software.
Product features
SIwave provides hybrid solutions for 2.5D and 3D electromagnetic that can be used with thermal and circuit solvers to conduct simulation analysis. It also offers a simplified ECAD design procedure. Within the Slwave environment, you can also use precise solver technologies to conduct electromagnetic analysis of the circuits. The solvers are listed in the following:
DCIR solver is exclusively built for predicting DC power transmission problems in electronic packaging and PCB. This solver uses a unique adaptive mesh refinement algorithm to ensure high-precision modeling for the ECAD primitives (e.g., plane, wiring, vias, bond wires, solder ball, and tin solder). The DC solver also allows bidirectional coupling with Ansys Icepak to solve the thermal effect caused by Joule heat.
AC Solver
Ansys SIwave AC solver calculates the resonance mode, SYZ parameters, and frequency domain voltage, while also predicts near-field and far-field radiation. Having the complex domain decomposition technology integrated, the AC solver is suitable for the modeling of non-ideal structures within the largest and the most complex design. Such structure includes (but is not limited to) traces routed across splits, traces referencing the ground level difference, and vias included in the irregular anti-pad. The AC solver is also equipped with a quick and fully designed signal solving function, allowing SI engineers to quickly identify trace dependence and time/domain frequency crosstalk violations.
The PSI 3-D fast FEM solver is utilized to extract PDN S parameters or SPICE models from IC packaging and PCB. Also, the 3D AC currents can be visualized in Slwave, displaying the signal, power, and return current.
The Chip Package Analysis (CPA) solver is built for extracting RLGC parameters in larger chip packaging designs. IC designers use the CPA solver in Ansys RedHawk to analyze chips and packaging designs.
Q3D Extractor
The Q3D solver is used to execute high-precision RLC parasitic extraction in IC packing and PCB.
Production functions and applications
IBIS and IBIS-AMI SerDes analysis
Ansys SIwave has circuit solutions for both parallel and SerDes buses. This includes the use of Ansys Nexxim or HSPICE circuit solver to conduct simulations for IBIS and IBIS-AMI driver/receiver models, and the use of IBIS and IBIS-AMI models generated through our latest SPISim technology. It includes the complete schematic captures and parameter designs of the design of experiment (DoE).
Virtual compliance
SIwave allows you to determine whether the DDR3/4 bus passes the Jedec standard or not. This solution offers a pass/fail standard for the key timing indicators, such as data configuration and hold timing, bit-to-bit skew timing, overshoot, undershoot, and others. The programming environment can provide compliance reports for almost all standards: DDR, USB, PCIe, MIPI, CISPR EMC, etc. Also, our latest SPISim technology can provide simple compliance reports for USB-C and COM calculations of IEEE 802.3bj and 802.3bs channels.
Automatic decoupling capacitor optimization
To reduce design cost and meet the budget, the optimization of the current large PCB and packing is primarily based on different models, prices, and amount of the installed capacitor, and it must achieve the goal without influencing the designed signal and power integrity performance. Slwave can find a set of optimized decoupling capacitor distribution at the lowest cost that meets the requirements of the designated impedance mold.
Impedance and crosstalk analysis
Zo and crosstalk analysis can provide accurate field solvers, characteristic impedance, and coupling coefficient for the traces in the PCB and packaging, generating HTML reports of easy-comprehension with all the contents required for a design engineer’s report.